IBM 160 Gbps Transceiver Actually Part of Optical Bus Research

A paper produced by IBM's Thomas J. Watson Research Center, which debuted at an optical technology conference and which IBM released to BetaNews this morning, reveals new and intriguing information: The 160 gigabit-per-second (Gbps) optical transceiver project that news sources mistook for some kind of Internet accelerator earlier this week, is actually intended as a test of optical bus manufacturing processes.

Specifically, it's part of the IBM's and Agilent Technologies' ambitious Terabus project - an investigation begun in 2005 to determine whether relatively unsophisticated manufacturing techniques may be used to endow chips with a very sophisticated part.

That part is optical chip-to-chip interconnection - like the HyperTransport bus in AMD Direct Connect Architecture, only using faster optical connections. A 2005 IBM Research report which helped launch this project cites the fact that CPU throughput capability is increasing far more rapidly than network throughput capacity. In time, what was considered the fastest optical network links just the other day may be considered bottlenecks to effective communication.

Since increasing the synchronous throughput rate of Tier 1 of the Internet is not an option at the moment, the Watson Center researchers, led by Clint L. Schow, came up with a stupendously simple alternative: jamming 16 10 Gbps transceivers onto a single CMOS chip, enabling a 16-channel simultaneous connection with an aggregate data rate of 160 Gbps.

That's where the speed came from: not an acceleration of the Internet but a segmentation of incoming data into channels.

The Schow team accomplishes this using so-called 8RF-LM manufacturing, which is a common 0.13 micrometer (130nm) fabrication process that involves eight metal layers in the production of an inexpensive CMOS chip. In the case of the optical transceiver, the form factor is called "flip-chip," where the die itself isn't tethered to the processor substrate using wirebonds. Instead, the die is given little bumps (the technical term for which is "little bumps") that, when the die is secured to the substrate, touch corresponding little bumps of solder on the upper surface of the substrate.

IBM doesn't explain exactly how the transceiver works in its paper, though it does pictorially demonstrate the results of its team's tests. What's particularly impressive is that each 10 Gbps "receiver amplifier circuit" is theoretically capable of functioning in a 15 Gbps optical network. If the Internet did get faster by 50%, this device would be ready.

Maybe more impressive is the fact that the entire package operates within a power envelope of 2.5 W. Today's Intel 10 Gbps optical transceivers boast 3.5 W power consumption.

But this morning's paper may not be a clarion call to the networking field that IBM has re-entered the optical transceiver business. More likely, the company is refining its chip development processes, which it could then use to produce chips for other companies, or perhaps license to others for low-volume production.

It may not be the sextupling or dectupling of download speed that the general press anticipated, so for some, the 160 Gbps transceiver may be a letdown. However, had there not been such a fervor over IBM's public relations characterization of this morning's research paper, perhaps a great many more people might never have come to recognize what could very well be regarded in a few years' time as one of the more important developments in the history of semiconductor manufacturing.